Sr Signal Integrity Engineer at Infinera Corporation
Shanghai, CN

Your Key Responsibilities Would Include:

- Work under a global diversified SI and PI design team crossing multi-sites to regulate and improve the company level design practice and competence.

- Work with system design teams to evaluate design tradeoffs and optimize design performance / risk / cost / manufacturability through all design phases.

- Design and analyze of high speed Serdes links and their compliance to standards with modeling of 3-dimensional structures in appropriate tool.

- Perform both pre- and post-layout signal integrity analysis for card design for high speed Serdes and other high speed links like DDRx.

- Carry out measurements on target design for design validation.

- Correlate simulation and measurement results and drive potential enhancement in modelling and test methodology.

- Follow up with standard body like IEEE and OIF for new standard evolving and actively work with relevant tool vendors for design implementation.

Education & Experience Necessary For Success:

- General knowledge in high speed design areas, like theory of high speed transmission line system as well as regular SI analysis capability in both time and spectrum domains.

- Experience with conventional Serdes interface , like simulation and testing of GE, XGE, PCI-E, 25Gbps interface , etc.

- Experience with high speed NRZ and PAM4 Serdes, PLLs, CDR and FEC is a plus.

- Good understanding of the IEEE 802.3 and OIF specifications for 25Gbps and 56Gbps APM4 Serdes Interfaces.

- Hands-on experience with different PCB materials and understanding cost/performance trade-off.

- Working knowledge of system level power integrity and budgeting (DC, AC, transient analysis).

- Hands-on experience of relevant tools like ADS, CST, HFSS, Hyperlynx ,SIWave and PowerDC , and measurement tool such as VNA, TDR, Real Time Scope and BERT.

- MSEE with 5+ years, or BSEE with 7+ years relevant experience.