Senior Mixed-Signal Circuit Design Engineer at Infinera Corporation
Sunnyvale, CA, US

Imagine being part of a team that is fundamentally changing the way people communicate, the way they collaborate, the way they watch TV and explore the universe through the internet. Utilizing our uniquely differentiated technology, we have created an Intelligent Transport Network with more speed, capacity and scalability than ever before. Imagine a world with unlimited bandwidth. The network of tomorrow will allow for content and creativity limited only by the imaginations of its users.

If this is something that interests you, that excites you, come take a look at a team not bound by large company obstacles and bureaucracy, where an idea today can be set in motion tomorrow. Come take a look at Infinera!

Engaging in the high resolution, low power analog circuit design, you have the chance to create the technical differentiation for Infinera to hold the market leadership. We together will revolutionize the era of efficient high speed transmission by building the cutting-edge circuitry.

Essential Functions and Key Responsibilities:

  • Design, implement, and simulate the functionality and performance of sigma delta (delta sigma) analog-to-digital converters (ADCs), including the modulator and digital decimation filter;
  • Design, implement, and simulate the functionality and performance of other various low power high resolution analog circuits;
  • Integrate the analog and digital IPs, and run simulations to ensure the functionality and performance;
  • Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality;
  • Need to comply with the team’s design methodologies and release flows.

Mandatory Knowledge/Skills/Abilities:

  • Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, Totem EM/IR, etc.
  • Must have a proven tracking record of designing sigma delta (delta sigma) ADCs and taking them to production;
  • Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis;
  • Must have a good understanding of device physics and the impacts of layout effects;
  • Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS;
  • Collaborative with other local or remote team members in a fast-paced professional environment.

Preferred Knowledge/Skill/Abilities:

  • Fluent in verbal and written communications;
  • Capable of coaching and mentoring new or junior circuit designers and layout engineers;
  • Independently resolves issues and conquer design challenges;
  • Self-motivated and detail-oriented.

Education and Experience Requirements:

  • Sr. Design Engineer: M.S. in E.E. with 3+ years’ experience, or Ph.D. in E.E. preferred
  • Staff Design Engineer: M.S. in E.E. with 6+ years’ experience, or Ph.D. in E.E. with 4+ years’ experience
  • Principal Design Engineer: M.S. in E.E. with 7+ years’ experience, or Ph.D. in E.E. with 8+ years’ experience